The use of hybrid CPU/FPGA systems shows great promise for dramatically improving the performance of data-intensive applications. In addition, a new generation of application switches with integrated FPGAs provide the ability to run high-performance and mission critical applications in the network itself. We believe the major impediment to full scale deployment of these systems is the time and effort required to design and implement integrated hybrid solutions.
Parallel Scientific's Awesome Haskell FPGA Compiler provides the environment that allows a developer to express hardware solutions in a high-level Domain Specific Language (DSL). The environment allows software simulation and testing of the solution in an interactive environment, thus avoiding the extremely long development cycle times traditionally required for FPGA design. Once the design has been verified in software, the compiler and tool chain create industry standard Verilog which then feeds into the FPGA vendor's existing tool chain.
Dr. Peter Braam, a former senior academic at Oxford and Carnegie Mellon, has extensive experience in the high-performance computing community. He initiated the Lustre File system effort as the founder of Cluster File Systems and in the last 12 years has seen 4 of his 5 startups acquired. Dr. Braam advises on parallel computing efforts across Europe and the US in numerous roles, and acts as an expert advisor to the European Community. At Parallel Scientific he acts as both CEO and Chief Architect to design modern, functionally correct solutions for business and technical computing.